The present invention relates to a solid-state imaging device such as a CCD type image sensor or a CMOS type image sensor where an on-chip microlens is mounted on a semiconductor chip having plurality of photoelectric conversion elements.
It has been known heretofore that a solid-state imaging device such as a CCD or CMOS type image sensor has a plurality of photodiodes (photoelectric conversion elements) arranged in a two-dimensional array, wherein a signal charge generated by each photodiode is converted into an electric signal by a peripheral element and then is outputted therefrom.
That is, in a CCD type image sensor, a signal charge obtained from each photodiode is transferred by a CCD vertical transfer register and a CCD horizontal transfer register, and then is converted into an electric signal by an FD (floating diffusion) part and a potential detecting MOS transistor provided in a final output stage, and such an electric signal is outputted.
Meanwhile, in a CMOS type image sensor, a gate circuit including a photodiode, an FD part and various MOS transistors is provided per each unit pixel, and a signal charge obtained from the photodiode is converted into an electric signal by the FD part and the potential detecting MOS transistor, and then is delivered to an output signal line.
In such an image sensor, it is necessary to raise the light condensing efficiency toward the photodiode so as to increase the sensitivity, and one of the known methods is carried out by providing an on-chip microlens (OCL) on a semiconductor chip where a solid-state imaging device is mounted.
FIG. 5 is a schematic partial plan view showing an exemplary layout of on-chip microlenses in a conventional solid-state imaging device.
This solid-state imaging device represents the aforementioned CMOS type image sensor, wherein each unit pixel 10 includes a photodiode 12, an FD part 14 and a read gate 16. The read gate 16 reads out the signal charge from the photodiode 12 to the FD part 14.
And the on-chip microlens 18 is positioned on the top surface of the solid-state imaging device via a color filter and so forth.
As shown in FIG. 5, the on-chip microlens 18 is formed into a single convex lens 18A correspondingly to one unit pixel 10.
However, in the above conventional solid-state imaging device where the on-chip microlens 18 is formed into a single convex lens 18A correspondingly to one unit pixel (light receiving part of the photodiode 12) 10, the device functions effectively in case the area of the unit pixel is small, but the following problems arise when the unit pixel has a relatively large area.
First, if a spherical lens is employed in particular for enabling a single convex lens to cover the entire light receiving region of one unit pixel, it is necessary to ensure a large radius of the on-chip microlens, i.e., to increase the height of the microlens, hence requiring a process of machining the microlens by the use of a thick material film to consequently bring about some difficulty in the process control.
Further, the film thickness of the on-chip microlens inclusive of the convex lens is rendered great to eventually exert harmful influence on the light transmittivity.
In order to avoid the disadvantages observed in this spherical lens, there may be contrived a trapezoidal lens structure where a center portion of each convex lens surface is shaped to be flat while only a peripheral edge portion thereof is shaped to have a curvature. However, even in such a shape, it is still impossible to eliminate the difficulty in the process control.
In the conventional solid-state imaging device, there exist the following two problems.
First, in the solid-state imaging device of this kind, any of wiring and the like for the peripheral circuit is not permitted in the light receiving part of the photodiode so as to secure an optical path therein. That is, the circuit wiring needs to be laid out in some other region than the light receiving part of the photodiode, hence enlarging the size of each unit pixel and reducing the aperture ratio which represents the rate of the area of the light receiving part to the pixel size.
Therefore, it is desired to achieve, in the conventional solid-state imaging device, an improved method which is capable of securing a circuit wiring region without sacrificing the area of the light receiving part of the photodiode in each imaging pixel.
In the solid-state imaging device of FIG. 5, a charge-transfer read gate is disposed in the edge of the photodiode (light receiving part). In this case, if the area of the photodiode is large, the read gate fails to overlap the lowest potential point at the time of reading the signal charge, so that the lowest point becomes a potential pocket and the charge transfer is not performed completely. For this reason, it is desired to realize an improved method of laying out the transfer gate in a manner to avoid such a problem.